Senior Hardware Design Engineer
Fairchild Imaging, Inc.
| Company | Fairchild Imaging, Inc. |
| Category | Engineering |
| Location | San Jose |
| Remote | On-site (inferred) |
| Employment | Not stated |
| Level | Senior |
| Salary | Not stated by the employer |
| Posted | 8 Jun 2026 |
| Last verified | 30 Jul 2026 |
| Source | Employer career page (greenhouse) |
Description
Fairchild Imaging, headquartered in San Jose, California is a specialty image sensor design and manufacturing company with deep experience in developing leading edge performance CMOS image sensors. Our portfolio of image sensors can be found in many high-performance imaging applications like space exploration, medical x-ray, sciences, quantum computing, machine vision, low light, and 360 situational awareness.
Senior Hardware Design Engineer – Imaging Systems and High-Speed Electronics
We are seeking an experienced Senior Hardware Design Engineer to lead the design and development of advanced PCB-based imaging platforms for next-generation CMOS image sensors , board-level cameras, and X-ray camera systems. This role requires deep expertise in high-speed digital hardware design, signal integrity, sensor integration, and system-level optimization for imaging performance and interface interoperability.
In addition to hands-on technical leadership, this role may include responsibility for mentoring engineers, driving technical direction across projects, and contributing to team growth and engineering excellence.
Key Responsibilities
Technical Leadership and Team Development
Provide technical leadership across hardware development programs for imaging and sensor-based products.
Mentor and guide junior and mid-level hardware engineers in schematic design, PCB layout, debug methodologies, and engineering best practices.
Lead hardware design reviews, architecture discussions, and cross-functional technical decision-making.
Establish and promote engineering standards for high-speed PCB design, signal integrity, documentation, and validation.
Support project planning, task prioritization, resource estimation, and execution tracking for hardware development activities.
May directly manage a small team of hardware engineers, including:
goal setting and performance feedback,
career development and coaching,
hiring and onboarding support.
Board-Level Camera and CMOS Image Sensor Platforms
Architect, design, and validate high-performance PCBs for board-level camera systems supporting state-of-the-art CMOS image sensors.
Develop hardware platforms for:
image sensor bring-up and debugging,
electrical and optical characterization,
internal evaluation platforms,
customer demonstration systems.
Design interfaces and interconnects for high-speed sensor communication, including:
SLVS/SLVS-EC
MIPI CSI-2 / D-PHY / C-PHY
LVDS and other high-speed serial interfaces.
Collaborate with sensor, firmware, software, and applications teams to ensure successful sensor integration and system functionality.
Optimize board architecture, power delivery, grounding, clocking, and layout to maximize sensor performance and minimize electrical noise.
Evaluate and mitigate hardware design impacts on end-user image quality, including:
noise floor,
fixed pattern noise,
EMI/EMC coupling,
timing integrity,
power integrity artifacts.
X-ray Camera Electronics
Design and develop hardware platforms for X-ray camera systems integrating image sensors, detector electronics, and high-speed data interfaces.
Architect PCB solutions for sensor interface, power management, control electronics, and data acquisition subsystems.
Lead hardware development focused on robust USB-C interoperability , including:
USB-C orientation support,
enumeration and configuration reliability,
sustained high-bandwidth streaming performance,
cable and host interoperability robustness.
Analyze and debug signal integrity challenges across USB-C and other high-speed interfaces in demanding imaging applications.
Signal Integrity and Hardware Excellence
Serve as subject matter expert in PCB design for high-speed/high-density electronics.
Perform and guide best practices for:
signal integrity analysis,
impedance control,
differential pair routing,
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