Job Opportunities API

Latitude AI ( lat.ai ) is building the future of Ford’s autonomy roadmap to make travel safer, less stressful, and more enjoyable for everyone. Bringing this vision to scale, our fully in-house developed hands-free ADAS platform will debut on Ford’s all-new Universal Electric Vehicle in 2027.  When you join the Latitude team, you’ll work alongside leading experts across machine learning and robotics, cloud platforms, mapping, sensors and compute systems, test operations, systems and safety engineering – all dedicated to redefining the relationship between people and their vehicles for millions of customers. As a Ford Motor Company subsidiary, we operate independently to develop automated driving technology at the speed of a technology startup. Latitude is headquartered in Pittsburgh with engineering centers in Dearborn, Mich., and Palo Alto, Calif. Meet the team: The Embedded Software team develops foundational platform software that is critical to development across the company. The team develops FreeRTOS, SafeRTOS, and bare metal environments for both QM and ASIL applications on a variety of embedded targets including ARM. Projects often impact all levels of the stack from the bootchain to applications and usually require cross-functional collaboration with other engineering teams. We have a strong passion for technical excellence and rigorous compliance with ASPICE and ISO26262. What you’ll do:  Drive the design and implementation of a centralized "source of truth" for system-level RTOS configurations, including DDR memory maps, UDMA channels, and peripheral assignments  Architect and configure MPU (Memory Protection Unit) and hardware firewalls to ensure "Freedom from Interference" (FFI) between safety-critical (ASIL) and non-safety (QM) tasks Lead the setup and evolution of the Hardware Abstraction Layer (HAL) and low-level drivers. Your goal is to create a common area for driver logic that scales across different projects and platforms Take broad responsibility for core SoC integration modules, ensuring they are architected for long-term maintainability and testability Profile and optimize low-level bus traffic and memory access patterns (DDR, DMA) to minimize latency and maximize throughput for real-time control loops Consistently perform deep-dive code reviews. Ensure that PRs are simple, bug-free, and adhere to a unified architectural vision to prevent "reinventing the wheel" Serve as the SME for hardware-software interfaces. Navigate ambiguity in hardware requirements and mediate disagreements in technical approaches through evidence-based influence What you'll need to succeed: Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, Robotics or a related field and 4+ years of relevant experience (or Master's degree and 2+ years of relevant experience, or PhD) Experience in embedded C/C++ with a deep understanding of advanced language features and design paradigms Proven expertise in ARM-based SoC architectures, including deep knowledge of memory-mapped I/O, DMA controllers (UDMA), and DDR bus configurations Direct experience configuring MPUs and hardware-level firewalls to enforce spatial and temporal isolation in a multi-core environment Experience building or significantly refactoring Hardware Abstraction Layers (HAL) to support multiple hardware targets or RTOS environments Ability to root-cause complex system hangs and race conditions involving shared memory and hardware peripherals without supervision Ability to see potential pitfalls in low-level designs (e.g., bus contention, MPU misconfigurations) and express designs in sufficient detail for rapid implementation Expert-level use of JTAG, Tracealyzer, and logic analyzers to verify low-level hardware-software interactions Nice to have:   Experience with ISO 26262 safety-critical development and the "Freedom from Interference"