Senior Compiler Engineer - Systems Team
Riverlane
| Company | Riverlane |
| Category | Engineering |
| Location | Cambridge |
| Remote | On-site (inferred) |
| Employment | Not stated |
| Level | Senior |
| Salary | Not stated by the employer |
| Posted | 11 Jun 2026 |
| Last verified | 2 Aug 2026 |
| Source | Employer ATS (greenhouse) |
Description
Senior Compiler Engineer – Systems Team
Cambridge, UK | Full-time | Permanent | Hybrid
Salary: £68,000 to £100,000, DOE
The salary range for this role is broad, as we are able to consider varying levels of experience. Any offer made will carefully take into account level of experience (including relevant industry experience), transferable relevant skills and previous relevant achievements.
We will also consider part-time applications for this role. Please indicate your preferred working schedule in your cover letter.
About us
Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion.
Having raised more than $125M in funding to date to accelerate our cutting-edge R&D in quantum error correction (QEC), Riverlane partners with many of the world’s leading quantum hardware providers and government agencies to make fault-tolerant quantum computing a reality. We’re making remarkable progress and growing fast.
About the role
Systems Engineering bridges the gap between Riverlane and its customers. They act as the primary technical interface for our customers’ engineers to guide them through product integration and help with troubleshooting complex quantum systems. They are key to securing design wins and driving product development.
As a Compiler Engineer, you will configure the software libraries and low-level code to run our custom DeltaFlow Hardware which connects to our customers Quantum Control Systems. You will work on creating predictable and stable low-latency, high throughput systems. You will use your knowledge and expertise to adapt our software to an ever-changing quantum control system to support scientists that are running quantum experiments.
This is a fantastic opportunity to join Riverlane’s team, that is developing the world’s most advanced quantum error correcting algorithms. The Riverlane team is a mix of mathematicians, physicists and engineers, working together on a range of exciting and cutting-edge projects.
What you will do
Technical pre-Sales:
Host Technical Workshops on Riverlane’s QEC Interface
Evaluate Customers Control System and Data Communication requirements.
Integration On-Site: End-to-End System Deployment.
Writing Python or C++ to adapt to customer’s control systems and ensure data packets are received correctly.
Work with Riverlane’s Quantum Application Team to design experiments to test the system.
Benchmark and discover hardware latency limitations.
Troubleshooting and Debugging: Managing Customer Issues
Report issues and help replicate the setup with the QA team in Riverlane.
Writing script to debug and trace faults
Update verification environment and the test vectors based on data gathered from the experiments that were conducted.
Customer Advocacy: Voice of the Customer to Riverlane Product Team
Highlight the success, issues and trends on customer’s Quantum Systems
Feedback key features that will be needed to win current and next generation products
What we need
A bachelor’s degree (or equivalent) in Computer Science, Electrical Engineering, or a related discipline
Broad knowledge of the whole software and hardware stack: compilers, operating systems, computer architectures
Experience in compilers (LLVM MLIR or others)
Experience of shipping software to users
Proficiency in Python; proficiency in C++ or Rust
Abil
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