Job Opportunities API

Job Title: R&D Engineer - Dry Process (Plasma Etch /Plasma Ablation/ PVD) Expert for Advanced Packaging applications Location:  Covington, GA Job Type:  Full-Time   About Us:  Absolics is a leading provider of advanced packaging technologies and services, offering scalable solutions for businesses of high-performance computing. We offer smart, innovative services to dozens of clients globally. By dedicating our efforts to establishing large glass substrates with built-in active and passive elements, our goal is to provide significant improvement in signaling characteristics and power consumption compared to existing solutions.   Job Description: We are seeking a highly skilled and motivated Dry Process Engineer to join our R&D team. In this role you will lead development of dry processing capabilities across plasma etch, physical vapor deposition, and plasma-based ablation steps for fabricating advanced packaging interconnect structures. This role sits at the intersection of thin-film metallization and dielectric patterning, requiring you to steer equipment and process qualification, process recipe development, and integration handoffs with lithography, wet process, and plating teams. You will be a primary technical owner for vacuum-based unit processes in a hands-on, early-stage R&D environment where design of experiment planning capabilities and rigorous root-cause analysis both matter.   Key Responsibilities: Develop and qualify plasma etch, PVD seed deposition, and plasma ablation processes for RDL build up and interconnect structures Help establish process flows that enable control of film uniformity, required via or trench step coverage and taper/sidewall profile, and layer-to-layer adhesion across the various plasma-based sub processes Establish recipes and tune plasma chemistry and tool parameters to optimize etch selectivity and minimize defects (micro-masking, residue, undercut) Perform root-cause and failure analysis on dry-process defects using SEM, XPS/AES, and electrical metrology Assess plasma-induced damage risk (charging, UV effects) on dielectrics and downstream reliability Collaborate with wet process and plating teams to ensure clean handoff of seed layers and trench/via structures   Required Skills Hands-on experience with plasma etch process development (RIE, ICP, or barrel plasma) in a semiconductor or packaging environment Direct experience with PVD sputter deposition of seed layers (Ti, TiW, Ta, Cu) including thickness uniformity, step coverage, and adhesion control Experience with plasma-based dielectric ablation techniques/descum on organic or inorganic dielectrics (ABF, PBO, PSPI, polyimide) Working knowledge of plasma chemistry fundamentals (O₂, CF₄, SF₆, Ar, N₂ chemistries) and their etch selectivity tradeoffs Proficiency with vacuum system fundamentals: chamber pressure control, RF/ICP power coupling, gas flow control, end-point detection Metrology and characterization skills: SEM, profilometry, XPS or AES for surface composition, four-point probe for film resistivity DOE design and statistical analysis for process optimization (Minitab, JMP, or equivalent) Root-cause and failure analysis experience for etch defects (micro-masking, undercut, residue, via taper control)   Preferred Skills Experience with plasma descum/etch-back for via clean prior to metallization (organic dielectric residue removal) Familiarity with PECVD or ALD for inorganic dielectric or barrier films (SiN, SiO₂, SiCN) Experience tuning trench taper angle, sidewall profile, and CD bias for fine-pitch micro structures (≤10 µm) Knowledge of dry plasma Ti seed removal as an alternative to wet etch (selectivity to underlying Cu RDL) Familiarity with plasma uniformity modeling, chamber matching, or tool-to-tool variation reduction Cross-process integration experience linking