AMS Verification Engineer
Weekday AI
| Company | Weekday AI |
| Category | Uncategorised |
| Location | Bengaluru |
| Remote | On-site (inferred) |
| Employment | Full-time |
| Level | Not stated |
| Salary | Not stated by the employer |
| Posted | 27 Jul 2026 |
| Last verified | 30 Jul 2026 |
| Source | Employer career page (workable) |
Description
๐ง๐ต๐ถ๐ ๐ฟ๐ผ๐น๐ฒ ๐ถ๐ ๐ณ๐ผ๐ฟ ๐ผ๐ป๐ฒ ๐ผ๐ณ ๐๐ต๐ฒ ๐ช๐ฒ๐ฒ๐ธ๐ฑ๐ฎ๐'๐ ๐ฐ๐น๐ถ๐ฒ๐ป๐๐ ๐ฆ๐ฎ๐น๐ฎ๐ฟ๐ ๐ฟ๐ฎ๐ป๐ด๐ฒ: ๐ฅ๐ ๐ญ๐ฑ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ - ๐ฅ๐ ๐ฎ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ (๐ถ๐ฒ ๐๐ก๐ฅ ๐ญ๐ฑ-๐ฎ๐ฌ ๐๐ฃ๐) Experience: 6+ yrs Location: Bengaluru Job Type: Full-time We are seeking a skilled AMS Verification Engineer with strong expertise in Analog and Mixed-Signal (AMS) verification to support the development of complex semiconductor designs. This role is ideal for professionals with hands-on experience in verifying analog, mixed-signal, and SoC designs while ensuring functional correctness and tape-out readiness. As an AMS Verification Engineer, you will collaborate closely with Analog Design, Digital Design, and Verification teams to develop robust verification environments, validate analog-digital interactions, and ensure high-quality silicon. You will play a key role in creating verification strategies, debugging simulation issues, achieving coverage closure, and contributing to successful product development across advanced semiconductor technologies. Requirements Key Responsibilities Develop and execute comprehensive verification plans for Analog and Mixed-Signal (AMS) IPs and SoC designs. Build, enhance, and maintain verification environments using SystemVerilog, Verilog-AMS, and UVM-AMS methodologies. Perform functional, behavioral, connectivity, and interface verification across analog and digital subsystems. Debug simulation failures, identify functional issues, and collaborate with design teams to resolve verification gaps. Execute regression testing, analyze results, and drive coverage closure to meet project milestones. Validate analog-digital interfaces and ensure seamless integration across mixed-signal designs. Support verification sign-off activities and contribute to tape-out readiness. Collaborate with cross-functional engineering teams to improve verification methodologies, automation, and quality. Maintain verification documentation, test plans, and simulation reports throughout the development lifecycle. Continuously improve verification processes by adopting industry best practices and automation techniques. What Makes You a Great Fit 6+ years of experience in Analog and Mixed-Signal (AMS) Verification . Strong hands-on expertise in SystemVerilog , Verilog-AMS , and UVM-AMS . Experience developing verification plans, testbenches, and regression environments for AMS and SoC designs. Strong understanding of analog-digital interfaces, behavioral modeling, and functional verification methodologies. Experience debugging simulation failures and resolving functional verification issues. Familiarity with coverage-driven verification and verification sign-off processes. Good understanding of semiconductor design flows and tape-out requirements. Strong analytical, debugging, and problem-solving skills. Excellent communication and collaboration skills with the ability to work effectively across cross-functional engineering teams. Passion for delivering high-quality semiconductor solutions through robust verification practices.