| CPU Power-Management Design Engineer | — | — | — | — | — |
| Server Firmware Architect Engineering | — | — | Lead | — | — |
| Senior Design Verification Infrastructure Engineer - VIPs and Testbench Engineering | IN | — | Senior | — | — |
| Staff Engineer - CPU Verification | IN | — | — | — | — |
| Senior Staff Software Quality Assurance Engineer Engineering | TW | — | Senior | — | — |
| Principal Design Verification Engineer – CPU Subsystem Power Management Engineering | — | — | Lead | — | — |
| Sr Engineer - Physical Design Engineering | IN | — | Senior | — | — |
| CPU Design Verification Engineer Engineering | IN | — | — | — | — |
| Datacenter System Software Architect Engineering | Santa Clara CA | On-site | Lead | — | — |
| Design Verification Engineer II – CPU Subsystem Engineering | — | — | — | — | — |
| Engineer I Engineering | IN | — | — | — | — |
| Engineer 1 Engineering | IN | — | — | — | — |
| Senior Staff Design Verification Engineer – Coherent Interconnect Engineering | — | — | Senior | — | — |
| Sr. Engineer, Customer Support Engineer Engineering | IN | — | Senior | — | — |
| Sr Staff Engineer, Power Integrity (PI), Signoff Lead Engineering | IN | — | Lead | — | — |
| Platform Technologies Language & Frontend Design Engineer Engineering | — | — | — | — | — |
| Staff DevOps & Backend Engineer | IN | — | — | — | — |
| Interconnect Design Engineer Engineering | Santa Clara CA | On-site | — | — | — |
| Staff Engineer, Physical Design Engineering | IN | — | Lead | — | — |
| Senior Customer Release Engineer Engineering | IN | — | Senior | — | — |
| Sr. Staff Hardware Design Engineer Engineering | — | — | Senior | — | — |
| Principal Interconnect Design Engineer Engineering | Santa Clara CA | On-site | Lead | — | — |
| Design Verification Engineer to Staff Engineer (Unit Level Test) Engineering | TW | — | Lead | — | — |
| Principal Design Verification Engineer – CPU Core Frontend Engineering | — | — | Lead | — | — |
| Linux Kernel Architect Engineering | — | — | Lead | — | — |
| Principal Design Verification Engineer – CPU Core LSU Engineering | — | — | Lead | — | — |
| Platform Technologies Language Design Intern | — | — | — | — | — |
| Staff / Sr. Staff Engineer DV Engineering | IN | — | Lead | — | — |
| Principal Design Verification Engineer – CPU Core Hardware Prefetch Engineering | — | — | Lead | — | — |
| Confidential Computing Software Architect Engineering | — | — | Lead | — | — |
| Senior / Staff Design Verification Engineer Engineering | IN | — | Senior | — | — |
